Job Description
Introduction
Design Methodology group is seeking an RF methodology architect to develop integrated design flows, linking RF chip and package enablement. Person is to provide technical leadership to cover RF design flow, Test/Modeling, PCB & Package methodologies. A background in RF and design methods is essential. You will be responsible for developing design flow of RF circuits per specifications, simulations and analysis of RF circuits, understanding of analog circuits, characterization of board of chip layout requirements.
Job Responsibilities
- Provide methodology solutions for RF design bridging across the system, IC, package/module & PCB design domains
- Experience in RF circuit block knowledge, understanding the theory and method on how to test RF products, knowledge of RF test parameters and specs, especially functional blocks for switches, LNA and PAs etc along with their main features and performance metrics
- Provide an efficient design flow using advanced EDA tool interoperability, and be an essential link between the RFIC designer & the foundry,leveraging Process Design Kits (PDKs) & RFIC transistor modeling
- Define process for multi-chip co-simulation flow (CMOS, SiGe BiCMOS & GaN) using EDA, electromagnetic (EM) tools with board-level components
- Ability to predict transistor-level behaviors at the system level with core concepts of board-level parasitics and discrete models in the form of S-parameter tiles
- Deep understanding of the physical IC characteristics, such as layout and substrate parasitics, RF transistor models, IR drops, electromigration, electromagnetics, and passive devices in IC
- Define System in Package (SIP)Design Flow to combine a variety of optimized components and chips into one system. Multiple ICs can be CMOS, SiGe BiCMOS, and GaN
- Good understanding of a module design leveraging a common schematic capture environment with IC design and to link to advance package tools, Spectre/SpectreRF or ADS, or other simulators & EM solvers such as Momentum (2.5D), or HFSS (3D)
- Understanding behavioral models for AMS/EM circuits, experience in Verilog-A/AMS and knowledge of PDK and spice models qualification
- Understanding of vendor simulators is essential and/or including DC/Transient/Noise/PSS, Cross corner PVT, Aging/Reliability analysis, MonteCarlo simulations
- Efficient programming skills in SKILL, Ocean, Python, Perl, TCL, or Shell, etc. Ability to provide automation solutions to improve design productivity and/or customer/design needs
- Knowledge in Perforce and/or LINUX/UNIX design environment, Virtuoso Schematic Editor, Virtuoso Analog Design Environment (ADE-L/XL/GXL), Virtuoso Layout Editor, Constraints, p-cells is required
- Work broadly with PDK, RF design teams and Business Unit managers to drive the flow & methodology solutions
- Good written and verbal communication skills, the ability to collaborate well with cross-functional teams and trains, coaches and mentors other members of technical team
- Experience in working with customers and/or vendors
Required Qualifications:
- Electrical / Electronics Engineering in Masters or Ph.D is preferred
- Direct experience in RF test and characterization
- Direct experience in chip or board level design
- 12+ years experience